1. Field of the Invention
The present invention generally relates to a pulse latch device, and more particularly to a device for storing pulse latch with logic circuit and thus having data storage function.
2. Description of the Prior Art
A conventional pulse latch can't be applied to the circuit design with low power and low energy consumption since the electronic device can't store data when being switch off, and thus the data would be disappeared or lost after the electronic device is switch off. Therefore, a storage component unaffected by the power must be added in a logic circuit, i.e. consuming additional times to store the data in and to restore the data from a non-power-off storage component. However, the method consumes not only additional storing and restoring times but also additional electric powers.
FIG. 1A illustrates a schematic diagram of a conventional latch circuit device, wherein the number 101 and the symbol “D” represent an input data signal, the number 102 and the symbol “SI” (scan in) represent to input a scan data signal, the number 103 and the symbol “SE” (scan enable) represent to choose data, i.e. to choose to input data signal from D or SI, the number 104 and the symbol “CK” represent a time clock signal, the number 105 and the symbol “Scan Latch” represent to scan the latch, the number 106 and the symbol “0”, “1” represent a signal channel of a digital signal being 0 or 1, the number 107 and the symbol “Latch” represent the pulse latch, and the number 108 and the symbol “Q” represent a normal output signal. Herein, the above-mentioned signals are connected to one another by a circuit.
FIG. 1B illustrates a time clock signal diagram of a conventional latch circuit, and the lateral axis is divided into 5 states from left to right, comprising:
“Active” representing at a normal operating state;
“Enter Sleep” representing to enter into a sleep state;
“Sleep” representing at a sleep state;
“Leave Sleep” representing to leave from a sleep state; and
“Active” representing at a normal operating state.
In addition, the vertical axis at left side in FIG. 1B is divided into 4 signals from top to bottom comprising a 110SleepEn signal, a 111NSLEEPIN signal, a 112CK signal and a 113Q signal with functions different from one another. Thus, as variations of signal waves illustrated in FIG. 1B, the conventional latch circuit can't store the data, i.e. the data is lost, after the conventional latch circuit is switch off. Hence, the conventional pulse latch can't store the data due to the stored data will be lost after the conventional pulse latch is switch off, thus the data must be stored in a non-power-off storage component which consumes additional times to store and restore the data. Note that the method also consumes additional electric powers and thus unable to applied to a lower power circuit device.
Accordingly, it is important to provide a new pulse latch circuit for providing a latch circuit with higher efficiency and storage function, thereby increasing the storage efficiency and decreasing power consuming.